If anyone wants to learn more about SIMDs I found this Quora article that summarizes what SIMDs are and an overview. https://www.quora.com/What-is-SIMD
tanmayghai18
I also found this really cool set of slides from CMU explaining SIMDs and their connection to GPU and vector computer architecture: https://www.ece.cmu.edu/~ece740/f13/lib/exe/fetch.php%3Fmedia%3Dseth-740-fall13-module5.1-simd-vector-gpu.pdf
arjunsrinivasan1997
Why does SIMD processing not imply SIMD instructions?
ayushsm
I think what they're trying to say is that we can use SIMD logic (i.e. vectorization) to help us with an instruction stream's execution/efficiency but we don't necessarily need to be using the SIMD instructions. We can apply the logic we want using different instructions or through different ways, so it doesn't necessarily imply that we are going to be using SIMD instructions simply because the logic applies.
JayShenoy
I'm interested in learning more about how hardware vectorization works and its tradeoffs with explicit vector instructions. From my limited knowledge of AVX instructions, the register size is expanded so that multiple instructions can be performed on a single word. With hardware vectorization, is each ALU a normal ALU that uses 32-bit (or 64-bit) registers, or are the registers here vectorized as well? Are there performance differences between the two?
hershg
This is a bit deep in the whole comp. arch. field, but there's actually a difference between SIMD and vector architectures. Look at "Vectors 1" and "Vectors 2" lectures from cs152 from this semester if you'd like to see more about this. It would be interesting to know if different GPUs have tried one architecture or the other and what the performance/price/etc... differences came out to be
If anyone wants to learn more about SIMDs I found this Quora article that summarizes what SIMDs are and an overview. https://www.quora.com/What-is-SIMD
I also found this really cool set of slides from CMU explaining SIMDs and their connection to GPU and vector computer architecture: https://www.ece.cmu.edu/~ece740/f13/lib/exe/fetch.php%3Fmedia%3Dseth-740-fall13-module5.1-simd-vector-gpu.pdf
Why does SIMD processing not imply SIMD instructions?
I think what they're trying to say is that we can use SIMD logic (i.e. vectorization) to help us with an instruction stream's execution/efficiency but we don't necessarily need to be using the SIMD instructions. We can apply the logic we want using different instructions or through different ways, so it doesn't necessarily imply that we are going to be using SIMD instructions simply because the logic applies.
I'm interested in learning more about how hardware vectorization works and its tradeoffs with explicit vector instructions. From my limited knowledge of AVX instructions, the register size is expanded so that multiple instructions can be performed on a single word. With hardware vectorization, is each ALU a normal ALU that uses 32-bit (or 64-bit) registers, or are the registers here vectorized as well? Are there performance differences between the two?
This is a bit deep in the whole comp. arch. field, but there's actually a difference between SIMD and vector architectures. Look at "Vectors 1" and "Vectors 2" lectures from cs152 from this semester if you'd like to see more about this. It would be interesting to know if different GPUs have tried one architecture or the other and what the performance/price/etc... differences came out to be